The invention relates to a semiconductor device comprising a silicon substrate, an insulating layer on said silicon substrate, a silicon layer on said insulating layer, said silicon layer being weakly doped with impurities of a first conduction type, a base region extending into said silicon layer from the free surface thereof, said base region being doped with impurities of a second conduction type, an emitter region, extending into said base region from the free surface thereof, said emitter region being heavily doped with impurities of said first conduction type, and at least one collector region extending into said silicon layer from the free surface thereof at a lateral distance from said base region, said collector region being doped with impurities of said first conduction type.
A bipolar silicon-on-insulator transistor having the above structure, is known from Andrej Litwin and Torkel Arnborg: "Extremely compact CMOS compatible bipolar silicon-on-insulator transistor for mixed high voltage and high density integrated circuit applications", Late News Paper at ESSDERC'93, September, 1993, and Andrej Litwin and Torkel Arnborg: "Compact Very High Voltage Compatible Bipolar Silicon-On-Insulator Transistor", ISPSD'93, Davos, June, 1994.
The emitter-base structure of such a transistor, is vertical but the high collector voltage is supported by a lateral fully depleted collector region. The transistor can be designed to handle almost any desired voltage up to several hundred volts.
One important feature of a high speed transistor is the unity gain frequency. This frequency is the inverse sum of the relevant transit times in the transistor. In the known silicon-on-insulator transistor the most important transit times are those required for vertical transport across the base and for lateral transport along the silicon-oxide interface. The physical transport mechanism is in most cases diffusion and not drift implying that the transit times are proportional to the inverse square of the transport distance. Since the lateral distance at the interface is larger than the vertical distance in the base the associated transit time is much larger. The speed of the transistor is thus mainly limited by the transit time at the interface.